From: kfraser@localhost.localdomain <kfraser@localhost.localdomain>
Date: Wed, 29 Aug 2007 10:34:01 +0000 (+0100)
Subject: x86: Kill Rise iDragon support.
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~14987^2~56
X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https:/%22bookmarks://%22Dat/%22http:/www.example.com/cgi/%22https:/%22bookmarks:/%22Dat?a=commitdiff_plain;h=4e8e84110921c9129738c22dc3d539cb5e5efa36;p=xen.git

x86: Kill Rise iDragon support.

Don't carry dead code needlessly: this is a family 5 CPU, which Xen
doesn't support. Perhaps, other CPUs' files could use some cleanup in
that respect, too, but there it would increase the delta to the Linux
origin of these files, while here the entire file can go away.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
---

diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile
index 1fa37dbe75..d477c99395 100644
--- a/xen/arch/x86/cpu/Makefile
+++ b/xen/arch/x86/cpu/Makefile
@@ -8,5 +8,4 @@ obj-y += intel_cacheinfo.o
 
 obj-$(x86_32) += centaur.o
 obj-$(x86_32) += cyrix.o
-obj-$(x86_32) += rise.o
 obj-$(x86_32) += transmeta.o
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 433f5a7641..e1d56e6921 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -524,7 +524,6 @@ extern int nsc_init_cpu(void);
 extern int amd_init_cpu(void);
 extern int centaur_init_cpu(void);
 extern int transmeta_init_cpu(void);
-extern int rise_init_cpu(void);
 
 void __init early_cpu_init(void)
 {
@@ -535,7 +534,6 @@ void __init early_cpu_init(void)
 	nsc_init_cpu();
 	centaur_init_cpu();
 	transmeta_init_cpu();
-	rise_init_cpu();
 #endif
 	early_cpu_detect();
 }
diff --git a/xen/arch/x86/cpu/rise.c b/xen/arch/x86/cpu/rise.c
deleted file mode 100644
index 3b1b0f4048..0000000000
--- a/xen/arch/x86/cpu/rise.c
+++ /dev/null
@@ -1,54 +0,0 @@
-#include <xen/config.h>
-#include <xen/lib.h>
-#include <xen/init.h>
-#include <xen/bitops.h>
-#include <asm/processor.h>
-
-#include "cpu.h"
-
-static void __init init_rise(struct cpuinfo_x86 *c)
-{
-	printk("CPU: Rise iDragon");
-	if (c->x86_model > 2)
-		printk(" II");
-	printk("\n");
-
-	/* Unhide possibly hidden capability flags
-	   The mp6 iDragon family don't have MSRs.
-	   We switch on extra features with this cpuid weirdness: */
-	__asm__ (
-		"movl $0x6363452a, %%eax\n\t"
-		"movl $0x3231206c, %%ecx\n\t"
-		"movl $0x2a32313a, %%edx\n\t"
-		"cpuid\n\t"
-		"movl $0x63634523, %%eax\n\t"
-		"movl $0x32315f6c, %%ecx\n\t"
-		"movl $0x2333313a, %%edx\n\t"
-		"cpuid\n\t" : : : "eax", "ebx", "ecx", "edx"
-	);
-	set_bit(X86_FEATURE_CX8, c->x86_capability);
-}
-
-static struct cpu_dev rise_cpu_dev __initdata = {
-	.c_vendor	= "Rise",
-	.c_ident	= { "RiseRiseRise" },
-	.c_models = {
-		{ .vendor = X86_VENDOR_RISE, .family = 5, .model_names = 
-		  { 
-			  [0] = "iDragon", 
-			  [2] = "iDragon", 
-			  [8] = "iDragon II", 
-			  [9] = "iDragon II"
-		  }
-		},
-	},
-	.c_init		= init_rise,
-};
-
-int __init rise_init_cpu(void)
-{
-	cpu_devs[X86_VENDOR_RISE] = &rise_cpu_dev;
-	return 0;
-}
-
-//early_arch_initcall(rise_init_cpu);